DFT Engineer
DFT Engineer
ThunderSoft1-3 Years
- Posted 8 hours ago
- Be among the first 10 applicants
Job Description
Preferred Experienced:
- Develop efficient and cost-effective structural and functional test patterns to ensure product quality and meet release schedules.
- Set up and verify bring-up sequences for various IP blocks at the SOC level through Simulation, Emulation, Bench testing, and ATE testing.
- Analyse test coverage, identify gaps, and address them with structural/functional test cases.
- Work with cross-functional teams (IC design, firmware/software, verification, characterization, and product test) to quickly resolve test pattern-related issues.
- Support the Quality team in Return Material Authorization (RMA) debugging, helping to meet customer commitments and improve overall quality.
- Assist ATE test teams in enhancing yield, reducing test time, and improving test quality.
Job Requirements:
- A Bachelor/Master's Degree in Electrical / Computer Engineering / IC Design or equivalent with 1 to 3 years of experience in semiconductor domain
- Hands-on experience in Verilog/System Verilog HDL coding, Embedded C firmware development for processor/microcontrollers, and scripting with Tcl, Python/Perl.
- Good knowledge of functional and structural test concepts/test methodologies.
- Strong analytical and problem-solving ability, good organizational skills with ability to multi-task, prioritize and track many activities.
- Good interpersonal and communication skills, and able to work well in a team environment that spans across continents.
- Hands-on experience in pre-silicon validation through simulation and post-silicon debugging using basic bench equipment is desirable.
- Good understanding of semiconductor fundamentals, digital electronics is a must
Comfortable in Linux environment
More Info
Key Skills
pre-silicon validation
structural test concepts
scripting with Tcl
post-silicon debugging
HDL coding
About Company
Skills:
Embedded C, C, Perl, Linux, Verilog, Python, Tcl, systemverilog, DFT test pattern development, Emulation, Post-silicon validation debugging, ATE testing, Simulation, Structural and functional test concepts and methodologies
Skills:
logic bist , UNIX, Linux, Perl, Verilog, Scripting, Tcl, ATE test experience, HDL design languages, SSA, Transition Path Delay, MBIST, ATPG verification, IDDQ, simulation playback, ATE patterns, VHDL, ASIC Design, Scan Logic, ATPG pattern generation, cshell, IJTAG, DFT logics
Skills:
Embedded C, Fpga, Soc, Python Scripting, Verilog, automation, Data Analysis, Test Development, AI technologies, systemverilog, Chip Architecture, Analytics, DFT solutions
Skills:
automatic test pattern generation , static timing analysis, ATPG tools, static power analysis, scan test, fault coverage, multi-power-domain designs, test models, scan structures, clock-domain crossing analysis, Tessent flows, IEEE 1500 embedded core test, debugging ATPG patterns, Product Quality, physical design closure, gate-level netlists, pattern generation, design-for-test methodologies, memory built-in self-test, IEEE 1149.1 boundary scan
Skills:
Jtag, Linux, Perl, Verilog, Tcl, FPGA synthesis, MBIST, Transition and Path-Delay fault models, Dft, ATPG, Scan Compression, Stuck-at, IJTAG