Shell, Perl, Python, Tcl, Sta, Cadence Tools, primetime, Fusion Compiler, SDC development, Tempus, signoff, EM IR, Physical Verification, Innovus, Calibre, physical design integration, PNR, StarRC, Timing Closure, low-power design

Perl, Linux Shell Scripting, Python, Tcl, DFT instruments, EDA Tools, make, ASIC development

synopsys primetime , Ecos, routing, Perl, Python, Tcl, Sta, Fusion Compiler, ICC2, LEC, Physical Design, Cadence Genus, noise analysis, Cadence Tempus, Logic Synthesis, cell sizing, timing convergence, Innovus, Timing Constraints, Synopsys Design Compiler, Timing Closure, Placement

Perl, Python, JMP statistical analysis tool

power analysis flows, STA analysis methods, FC synthesis, 3D IC design, EDA Tools, low-power design methodologies, digital physical design flow, PR PV PI STA design flows

containerization , python, Technical Documentation, Asynchronous programming, Nosql, Streaming, context engineering, a/b testing, ragas, chatbot development, Content Moderation, retrieval-augmented generation, vector search, red-teaming, policy enforcement, ci/cd, g-eval, Caching, cost/latency budgeting, hybrid search, batching, Mentoring, llm development, prompt engineering

Shell, Perl, Python, Tcl, Sta, Cadence Tools, primetime, Fusion Compiler, SDC development, Tempus, signoff, EM IR, Physical Verification, Innovus, Calibre, physical design integration, PNR, StarRC, Timing Closure, low-power design

rc extraction , routing, Static Timing Analysis, Correlation, Perl, Tcl, Sta, CTS, synthesis DFT, LVS, sign-off, Netlist to GDS, Synthesis, GDS validation, scan validation, RTL to GDS, Layout, Floor Planning, DRC, Timing Closure, Placement, backend design EDA tools, clock tree insertion, Synopsys ICC2, EDA software

Perl, Python, Tcl, Tk, Physical Design, Automatic Place and Route

Perl, Python, Tcl, Sta, Signoff, SDC development, Physical Verification, EM IR, Timing Closure, Physical design integration, PNR, EDA Tools, Low-power design