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Sr/ IC Design Engineer (Physical Design)

Sr/ IC Design Engineer (Physical Design)

ethos search associates pte. ltd.
1-4 Years
SGD 5,000 - 10,000 per month
  • Posted 10 days ago
  • Be among the first 10 applicants

Job Description

Job Description

  • Design and Develop ICs using leading EDA software work on RTL to GDS, including synthesis, layout, floor planning, placement, clock tree insertion and routing.
  • Responsible for GDS validation like DRC/LVS, timing closure sign-off, scan, validation etc.
  • Design, implement and maintain synthesis, DFT and Static Timing Analysis scripts using best-in-class methodologies.
  • Work closely with other groups like Analog Design, Systems, Applications and Production in determining architecture and specification of the products.

Job Requirements

  • Bachelor/Masters Degree in Electronics/Electrical/Computer Engineering with 1 year or more experience
  • Good experience and knowledge in design flow from Netlist to GDS, Synthesis, layout, Floor Planning, route , STA, CTS, RC Extraction and correlation
  • Static timing analysis, power and noise analysis and back-end verification across multiple projects.
  • Proficient with backend design EDA tools, Synopsys ICC2 preferred
  • Successfully track records of taping out complex SOC
  • Working knowledge of deep sub-micron routing issues as they relate to power and timing.
  • Proficiency using Perl and TCL
  • Self-motivated team worker, good verbal and written communication skills

Ethos Search Associates

EA Licence No: 13C6655
EA Reg No: R1109557 Rose

More Info

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Key Skills

CTS

synthesis DFT

sign-off

Netlist to GDS

GDS validation

scan validation

RTL to GDS

DRC

backend design EDA tools

clock tree insertion

Synopsys ICC2

EDA software

Correlation

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1-4 yrs
SGD 5,000 - 10,000 per month
Singapore
Skills:
Routing, Perl, Tcl, Clock tree insertion, GDS validation, LVS, Timing Closure, Synthesis, Layout, Placement, DRC, Sign-off, Analog Design, Backend design EDA tools, Noise analysis, Floor Planning, Static Timing Analysis scripts, Deep sub-micron routing, Scan validation, Synopsys ICC2, EDA software, Back-end verification