Usb, Mac, Pcie, Perl, Ethernet, Shell scripting, System Verilog, Python, Tcl, AHB-Lite, Uvm, AMBA, Axi, APB

Unix, Makefile, Configuration Management, Shell, PERL, System Verilog, Python, ARM CPU, PCI Express, verification dashboarding tools, Uvm, AMBA bus protocols, Ethernet bus protocols

Usb, Tcl, Ethernet, Python, Perl, Pcie, DDR, systemverilog, Uvm, coverage-driven verification, AMBA, digital design RTL understanding, SVA, MIPI

Pcie, System Verilog, Python, Systemc, Hybrid test benches, MDV, DV signoffs, SV, Uvm, UCIe, Axi, CDV

Perl, Python, Tcl, DisplayPort, HDMI, MIPI DSI, Uvm, systemverilog

Spi, I2c, Gpio, Uart, Pcie, DDR, UVM methodology, I3C, QSPI, CXL, systemverilog, HBM

Shell, Perl, Python, Tcl, Debugging RTL verification issues, Assertions SVA, SoC IP architecture and verification methodologies, UVM methodology, systemverilog, Functional Verification, Coverage-driven verification

simvision , python, Cadence simulation tools, Uvm, Xcelium, netlist simulation

code coverage , Nvme, Pcie, Ethernet, System Verilog, DDR, Uvm, Axi, APB, CXL, Industry-standard simulation and debug tools, UCIe, AHB, BFMs, Scoreboards, Checkers, Monitors, Functional coverage, Assertions