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Senior Design Verification Engineer
thundersoft india private limited

Senior Design Verification Engineer

thundersoft india private limited
5-12 Years
Not Disclosed
Early Applicant
  • Posted 22 days ago
  • Be among the first 10 applicants

Job Description

Senior Design Verification Engineer

Location: Bangalore/Hyderabad

Exp- 5 -12 yrs

NP - 0-30 days/Immediate

Role and Responsibilities: Domain: AXI, PCIe, UCIe protocol experience is highly preferred

1. Must have experience in developing test benches for IP/Subsystems/SoC.

2. In depth knowledge and hands on experience in the execution of verification of SoC/Sub System/IP DV.

3. Previous experience of independently driving IP DV projects from ability to lead a team by providing technical guidance, as well as be part of execution by debugging and SoC architecture understanding capabilities.

4. Strong hands on experience with common verification tools and methodology including UVM/ System Verilog/CDV/MDV, DV signoffs.

5. Must have a strong domain expertise in one or more following areas - AXI/PCIe/UCIe.

6. Experience in Hybrid test benches (SV, SystemC, Python) and SystemC based reference model test vectors/stimulus based verification is desirable.

Interested candidates can share resume to [Confidential Information]

More Info

Job Type:
Permanent Job
Industry:
Semiconductor Manufacturing
Function:
Engineering
Employment Type:
Full time

Key Skills

Hybrid test benches

MDV

DV signoffs

SV

Uvm

UCIe

Axi

CDV

Pcie
System Verilog
Python
Systemc
Last Updated: 23-10-2026 10:32:11 PM

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