C, C++, PERL, Python, Dft, Advantest 93000 tester, test pattern development, APTG, test cell integration

Out of Order Super Scalar Multi-Threaded Core Architecture, Processor Core silicon bring up, RTL design with Verilog or VHDL, High frequency instruction pipeline designs

Verilog, Scripting Languages, Ethernet, systemverilog, Uvm, low power design, Functional Verification, Testbench Development, Simulation Tools, Debugging Techniques, Timing Analysis

power integrity , Power Delivery Network (PDN) optimization, Signal Integrity (SI), Clock Tree Synthesis (CTS), Electromigration (EM), Static Timing Analysis (STA), floorplanning, UPF, Routing Optimization, IR Drop, Physical Verification, Placement, ASIC SoC Physical Design, CPF, multi-voltage design techniques

perl, Jtag, Shell, Scripting Languages, Seimens-Mentor Graphics DFT tools, DFT concepts, MBIST, DFT insertion, vector simulation, coverage improvement, ATPG, Verification, post-silicon debug, pattern generation, TestKompress, FastScan

systems architecture , Qt, C, C++, Application Architecture, Cybersecurity, Embedded Software, QML, Linux, middleware, Python, risk management, reusable platform technologies, Quality Systems, embedded Linux architecture, design controls, medical-device development

Pcie, Debugging, cdc, regression management, coverage-driven methodologies, AMBA protocols, WLAN MAC verification, Uvm, assertion-based verification, systemverilog, RDC analysis, Axi, IEEE 802.11 standards, APB, EDA Tools, AHB