Design Verification (Low Power)

Description

We are seeking a skilled Design Verification Engineer specializing in Low Power designs. The ideal candidate will have extensive experience in verifying digital circuits and a strong understanding of low power design techniques. This role involves collaborating with design teams to ensure that all specifications are met and that the final product is efficient and reliable.

Responsibilities

• Develop and execute design verification plans for low power designs.
• Create and implement testbenches for functional and performance verification.
• Analyze simulation results and debug issues in collaboration with design teams.
• Ensure compliance with design specifications and requirements.
• Work closely with cross-functional teams to resolve design-related issues.
• Document verification processes and results for future reference.

Skills and Qualifications

• Bachelor's or Master's degree in Electrical Engineering or related field.
• Strong knowledge of digital design principles and low power design techniques.
• Proficiency in SystemVerilog and UVM (Universal Verification Methodology).
• Experience with simulation tools such as Cadence, Synopsys, or Mentor Graphics.
• Familiarity with scripting languages such as Python or Perl for automation.
• Excellent analytical and problem-solving skills.
• Ability to work collaboratively in a team environment.