Senior Engineer - DFT
- Posted 2 months ago
- Be among the first 10 applicants
Job Description
Job Requirements
Designation: DFT-Engineer/Sr. Engineer/Lead
Experience:35
Location: Bangalore
Work Experience
DFT - SSN | Scan | ATPG | MBIST | GLS | SDC |
Must have SSN experience for minimum of 2 Blocks/Partitions
Designation: DFT-Engineer/Sr. Engineer/Lead
Experience:35
Location: Bangalore
Work Experience
DFT - SSN | Scan | ATPG | MBIST | GLS | SDC |
Must have SSN experience for minimum of 2 Blocks/Partitions
More Info
About Company
Skills:
hardware description languages (HDLs), Jtag, BSDL standards, DFT IP development, MBIST, DFT methodology, Test clocking requirements, simulation methodologies, silicon debugs, ATPG, Simulation environments, ASIC DFT Implementation tools, Test mode timing closure, Scan, MBIST implementation, Shmoo, DFT Architecture
Skills:
Perl, Python, Tcl, scan compression, BSCAN, Simulation, MBIST, DFT insertion, ATPG, LBIST, pattern generation, IJTAG
Skills:
Test insertion and verification, DFT concepts, Yield improvement, MBIST, Coverage improvement, Post silicon debug, Tessent Shell, ATPG, Mentor Graphics DFT tools, Pattern generation, Vector simulation, IJTAG, DFT Architecture
Skills:
perl, Vcs, Jtag, shell scripting, Awk, Design Compiler, Verdi, Fusion Compiler, BIRA, NCSim, MBIST, Tessent, ATPG, TetraMax Tool, BISR, Modelsim, Tester scan
Skills:
Scan Compression Techniques, Fault Models, DFT Tools, Sign-Off, Scripting Automation, DFT Implementation, Boundary Scan IEEE 1149.1, Test Coverage Optimization, Post-Silicon Validation