Analog Layout Engineer
trulyyy pte. ltd.- Posted 4 days ago
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Job Description
Analog Layout Engineer
About the Role
Join a global leader in chip design and high end IC components. We are looking for Analog Layout Engineers of different seniority levels to lead physical layout executions and signoff on physical execution
Key Responsibilities
- Lead floor planning, placement and custom physical routing for analog and mixed-signal macro modules.
- Independently execute full physical verification suites, including Design Rule Checking (DRC), Layout Versus Schematic (LVS) and Electrical Rule Checking (ERC).
Requirements
- Bachelor's degree in electronic engineering or semiconductors
- 2-8 years with analog layouts at either OEMs, ODMs, or Fabless companies
- Hands-on experience designing on sub-8nm advanced process nodes (FinFET) exposure to memory structures (SRAM) is a strong advantage.
If you are interested in this opportunity, please Apply Now or email your CV to [Confidential Information]. Referrals are greatly appreciated.
Regrettably, only shortlisted candidates will be notified.
Please note that data provided is for recruitment purposes only.
Business Registration No.: 202004228R | License No.: 20S0118 | EA Registration No.: R2210710
More Info
Key Skills
Custom Physical Routing
Electrical Rule Checking (ERC)
Design Rule Checking (DRC)
Sub-8nm Advanced Process Nodes
FinFET
Layout Versus Schematic (LVS)
Memory Structures
About Company
