Usb, Mac, Pcie, Perl, Ethernet, Shell scripting, System Verilog, Python, Tcl, AHB-Lite, Uvm, AMBA, Axi, APB

Unix, Makefile, Configuration Management, Shell, PERL, System Verilog, Python, ARM CPU, PCI Express, verification dashboarding tools, Uvm, AMBA bus protocols, Ethernet bus protocols

Usb, Tcl, Ethernet, Python, Perl, Pcie, DDR, systemverilog, Uvm, coverage-driven verification, AMBA, digital design RTL understanding, SVA, MIPI

Pcie, System Verilog, Python, Systemc, Hybrid test benches, MDV, DV signoffs, SV, Uvm, UCIe, Axi, CDV

Spi, I2c, Gpio, Uart, Pcie, DDR, UVM methodology, I3C, QSPI, CXL, systemverilog, HBM

C, Perl, Python, Fpga, Emulation platforms, Uvm, systemverilog, AMBA bus protocols, Transaction level modeling, Automation scripts, RTL

cache coherency , Uvm, DMA engines, ARM-based SoCs, memory systems, systemverilog, Transaction-level verification, CHI, Ace, AXI NoC architectures

code coverage , Nvme, Pcie, Ethernet, System Verilog, DDR, Uvm, Axi, APB, CXL, Industry-standard simulation and debug tools, UCIe, AHB, BFMs, Scoreboards, Checkers, Monitors, Functional coverage, Assertions

Usb, Ovm, Pcie, Ethernet, Test and coverage plan, Verification environment, Uvm, VMM Test Harness, Assertion checkers, MIPI, Coverage and scenario creation, Validation plan, System Verilog HVL