We are looking for result-driven candidates who would thrive under a fast-pace working environment and having a strong desire to make an impact in their organization.
Job Description:
- Structure Test Expert: either domain expected: ATPG, MBIST over design to silicon
- Proficient in ATPG tools (e.g., Synopsys, Cadence, Mentor) for scan test pattern generation and fault coverage analysis.
- Experienced with Memory BIST architecture, insertion, and debugging for embedded memory testing.
- Knowledgeable in pseudo-random pattern generation using LFSRs for scan and BIST applications.
- Hands-on experience with Automated Test Equipment (ATE) such as Advantest or Teradyne, including test program development and pattern debug.
- Skilled in scripting (Python, Perl, TCL) for automation and data analysis.
- Strong understanding of digital design, DFT concepts, and test flows.
- Effective in cross-functional teamwork, problem-solving, and technical documentation.
Job Requirements:
- Bachelor/Masters Degree in Electrical/Computer Engineering
- Min. 8 years of RTL design experience
- Familiarity with MIPS/ARM/SNPS ARC CPUs
- Experience with Post-Silicon, FPGA, DVT, SLT debug is a PLUS
- Cross-site working experience is a PLUS
- Modem or Automotive HW design experience is a PLUS
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