Bachelor's degree in Electrical Engineering or related field with 8+ years of experience. Master's or PhD with 5+ years of experience preferred.
Strong understanding in analog circuit design in High Speed Serdes input matching network, semiconductor device physics and analog blocks (regulators, amplifiers, filters, transceivers)
Good Proficiency on the following topic will be added benefit.
Proficient in ESD/Latchup standards and protection techniques and EDA tools (e.g., Cadence Virtuoso, Spectre, SPICE)
Knowledge in design rules for advanced process nodes
Job Responsibilities
Optimizing the input network to achieve most optimum bandwidth.
Architect and implement ESD protection schemes for high-speed analog and mixed-signal IP.
Review circuit and layout designs, perform simulations, and ensure compliance with ESD standards.
Collaborate with IP designers to mitigate ESD risks while preserving analog performance.
Work on leading-edge nodes including 3nm FinFET and 2nm GAA technologies.
