THE ROLE:
You will be in AMD's Test Development team and build the automation backbone behind next-generation FPGA and ASIC silicon, you will own and evolve large-scale test infrastructure that directly impacts first-silicon success, manufacturing quality, and time-to-market for industry-leading products. Your main responsibility is to develop automated system/tools for silicon test patterns generation/release, for the industry's cutting-edge FPGA/ASIC products. Automation tools include but are not limited to FPGA test design synthesis/implementation, Func/Scan/MBIST patterns creation, ATE test sequence generation, various custom scripts for ad-hoc pattern changes/debugging, and test data analytics. The automation tools will be used by multiple teams to help improve their work efficiency and productivity, while improving first-time-right for test patterns.
THE PERSON:
You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Own and evolve automated test infrastructure for pre- and post-silicon validation across FPGA and ASIC platforms
- Enhance existing FPGA synthesis/implementation tools/flow by adding proper resources/timing constraints to generate robust test patterns that are scalable across product families
- Build automation frameworks using modern software methodologies (Python, orchestration, web services, Gen-AI workflows)
- Invent automated tool for post-silicon validation test sequence that works across test methods and hardware test platforms e.g., bench system board and Automatic Test Equipment (ATE)
- Explore and implement innovative data analytics flow/tools to process large amount of manufacturing test/debug data to improve pattern debug efficiency, by applying state-of-the-art AI/Machine-learning algorithms
- Improve first-time-right silicon success through systematic sanity checks and validation methodologies
PREFERRED EXPERIENCE:
- Experienced in software development for engineering or infrastructure tools
- Proficient in Python, Shell/TCL scripting in Linux environment
- Familiar with automation and system regression testing is highly desirable
- Exposure to data visualization tool such as Power BI will have added advantage
- Exposure to VHDL/Verilog and experience in development of FPGA design is a plus
- Knowledge of functional simulation environments for pre-silicon verification is a plus
- Prior knowledge of structural or functional verification methodologies is also a plus
- Strong analytical thinking and ability to collaborate across disciplines
ACADEMIC CREDENTIALS:
- A Bachelor/Master's Degree in Computer Science/Electrical Engineering or equivalent
LOCATION:
Singapore
