Location: Singapore or Ho Chi Minh City, Vietnam
In this position, the individual thoroughly understands digital design specs of various IP blocks and SoC architecture definition.
- Develop detailed module level test plans for all the functional features, based on the design spec.
- Develop ASIC verification environment including all the respective components such as stimulus, checkers, assertions, monitors and scoreboards.
- Develop directed and constrain-random verification functional tests and simulate using EDA tools to verify functional spec is working.
- Execute verification plans, including design bring-up, DV bring-up, regression enabling for all the features.
- Collaborate with digital design team to debug functional testcases and deliver functionally correct designs.
JOB REQUIREMENTS
- Bachelor/Masters in Electronics/Electrical Engineering.
- Level of Expertise: At least 6+ year of IP verification skills.
- Working experience: AMBA bus, PCIe gen2/3/4/5.
- Strong VLSI functional verification experience, preferably with exposure to complex, high speed custom VLSI products.
- Strong hardware functional verification language and Object-oriental language development skill.
- Preferred with strong knowledge in System Verilog, UVM, Python (TCL/Perl a plus)
- Familiar with ASIC verification methodology, tools, and development flow.
- Strong communication, analytical and documentation skills and ability to interface with other groups.
