Research Fellow / Research Engineer / Research Associate (Secure Hardware Design)

About TUMCREATE

TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus for Research Excellence and Technological Enterprise (CREATE). We are joining forces with universities,public agencies, and industry for the advancement of future technologies.

Please visit www.tum-create.edu.sg for more information about TUMCREATE.

Job Purpose/Objective of the Position:

We are seeking a highly motivated researcher in Secure Hardware Design, focusing on the integration and efficient implementation of post-quantum cryptographic (PQC) algorithms in a RISC-V-based processor platform.

The position emphasizes hardware/software co-design, accelerator design, and ASIC-oriented implementation, targeting an open-source, verifiable post-quantum secure system.

This is a fixed term contract until March 2029 when applicable.

QUASAR Project Overview:

The QUASAR project focuses on implementing Post-Quantum Cryptography (PQC) within the RISC-V ecosystem. This is a high-stakes, cutting-edge initiative designed to secure future digital infrastructure against quantum threats. QUASAR is a collaborative effort between Fraunhofer, Technical University of Munich (TUM), Nanyang Technological University (NTU), and National University of Singapore (NUS), fostering long-term research collaboration and talent development in quantum security.

Job Responsibilities:

• PQC Accelerator Design & Integration

Design and implement hardware accelerators for post-quantum cryptographic algorithms (e.g., lattice-based,hash-based schemes)

Perform microarchitectural exploration for: throughput/latency optimization and area and power efficiency trade-offs

Integrate accelerators into a RISC-V-based SoC (e.g., tightly coupled or via interconnect)

• Hardware/Software Co-Design for Secure Systems

Co-design PQC implementations across: hardware accelerators and Firmware/runtime libraries

Optimize interaction between: processor pipeline, memory hierarchy, and cryptographic modules

Support system-level execution(bare-metal / OS-level) for end-to-end validation

• Hardware Security &Side-Channel-Aware Design

Evaluate and enhance side-channel resistance of PQC hardware implementations

Analyze vulnerabilities such as power/timing leakage and microarchitectural side channels

Study security-performance trade-offs in hardware implementations

• System Integration & Prototype Validation

Integrate designed components into a full RISC-V system prototype (FPGA or simulation-based)

Validate functionality using simulation and FPGA-based prototyping (when applicable)

Collaborate with verification and platform teams to ensure correctness across abstraction layers and smooth transition toward manufacturable ASIC designs

Job Requirements/Competencies:

• Degree in Electrical Engineering,Computer Engineering, Computer Science, or related fields
• Strong foundation in digital design/hardware security/Computer architecture
• Familiarity with RISC-V architecture or SoC design
• Programming skills in C/C++ and/or Python
• Preferred to have:

Experience with cryptographic hardware design (especially PQC is a plus)

Knowledge of side-channel attacks and countermeasures

Familiarity with open-source EDA tools (Yosys, OpenROAD, etc.)

What TUM CREATE offers you

• Hands-on experience with a state-of-the-art open-source RISC-V coreon FPGA
• A well-established FPGA platform with a clearly defined research scope
• Close supervision within an international, interdisciplinary research project
• A collaborative and inclusive world-class research environment
• Competitive salary that is commensurate with experience
• Medical insurance
• Good amount of leave/vacation days
• Vibrant, modern and positive working environment in Singapore
• Campus-sited office location with a host of facilities
• In-building perks including gym, game room and coffee room

Applications

Please send your complete application,including cover letter (compulsory), CV, university transcripts (compulsory) to [Confidential Information].

Only shortlisted candidates will be contacted.

We look forward to your application!