Responsibilities
- Design and implement digital logic for ASIC, AI, and CPU chip development using advanced process nodes to meet performance targets
- Develop and execute verification plans by performing simulation, debugging, and validating design functionality to ensure quality
- Implement design-for-testability (DFT) features to enhance chip test coverage and improve reliability
- Participate in RTL design, integration, and optimization to achieve performance, power, and area (PPA) goals
- Maintain and improve IC development environments, tool flows, and verification methodologies for efficient workflows
- Contribute to the development and optimization of in-house EDA tools and automation scripts to streamline design processes
- Collaborate effectively with cross-functional teams including architecture, physical design, and software to ensure successful tape-out
Preferred competencies and qualifications
- Knowledge of hardware description languages such as Verilog and SystemVerilog
- Exposure to ASIC/SoC design, AI chips, or high-performance computing environments
Requirements
- Bachelor's degree or higher in Electrical Engineering, Computer Science, Microelectronics, Physics, or related fields
- Solid foundation in digital logic design and computer architecture demonstrated through academic or project work
- Familiarity with IC design flow including RTL design, simulation, and verification methodologies
- Strong analytical thinking and problem-solving skills applied in fast-paced learning environments
- Candidates with relevant academic background, including those at early stages of their career, are encouraged to apply.
