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Lead Design Verification Engineer
Location: Bengaluru, India
Experience: 7–12 Years
Role
Lead the verification of complex IPs and SoCs, driving end-to-end verification strategy, methodology, and signoff for high-performance silicon.
What You'll Do
What You Bring
Preferred
We're looking for engineers who build robust verification infrastructure, solve complex silicon challenges, and deliver first-pass silicon success through technical excellence.
Job ID: 152086153
Skills:
Soc Architecture, System Verilog, digital design concepts, UVM Universal Verification Methodology, debugging using waveforms and logs
Skills:
Perl, Shell scripting, Python, Low Power Verification UPF CPF, AMBA AXI AHB APB, USB 2.0 3.x, ARM-based SoCs, SystemVerilog UVM
Skills:
Ovm, System Verilog, Uvm, constrained random verification methodologies, FPGA prototyping, FPGA architecture, Pre Silicon Validation Verification
Skills:
Tcl Scripting, Doors, DO-254 development process, Electronics Electrical Engineering, Knowledge of Hardware Board and different components like ADC DAC Serial Memory, RTL development using VHDL, Hardware system design knowledge of digital logic, FPGA verification developing Test case Test procedures Test bench debug and simulation using Modelsim Questasim, FPGA Synthesis Place and Route, Developing timing constraints solving CDC issues timing analysis and timing closures for FPGA, Different bus protocols like I2C SPI QSPI UART AXI DDR3 4 PCIe JTAG, FPGA design tools like Libero
Skills:
Test Case Creation, Shell, Perl, Python, Advanced Debugging skills, Uvm, testbench development, coverage-driven verification, Computer Architecture concepts, Formal Verification techniques, Functional Verification, Rtl Design