Campus Singapore-ASIC Design Engineer

Design and implement leading AI inference chip

Responsibilities:

• Design the microarchitecture of AI chip SoC and the subsystems including AI accelerator units, NoC/interconnect, etc
• Implement microarchitecture design using HDL
• Optimize performance, timing, area, and power of the designs
• Perform critical analysis and propose novel chip architectures for performance, power, and area improvement
• Write patents

Qualification:

• Bachelor's degree and above in Electrical & Electronic Engineering, Computer Science or equivalent
• Knowledgeable in computer architecture, such as AI Accelerator, CPU, network-on-chip, memory hierarchy
• Familiar with hardware module development using HDLs
• Strong learning capability, good communication and collaboration skills
• Fresh graduates are also encouraged to apply

Preferred Qualifications:

• Course or personal projects involving Verilog, SystemVerilog, FPGA, or processor design
• Exposure to hardware verification, synthesis, or timing analysis

Growth opportunities:

• State of art AI chip architecture design and implementation
• Extensive exposure to advanced-node ASIC design