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Skills:
power integrity , Ansys, Perl, Static Timing Analysis, Python, Tcl, Physical design EDA tools, VLSI design tools, Cadence, Mentor, LVS, Place Route, Physical Verification, Spice Simulation, DRC, Synopsys
Skills:
Linux, Bash, UNIX, Tcl, EDA Tools, Siemens, Cadence, Synopsys
