In HBM HIG (High Bandwidth Memory, Heterogeneous Integration Group), we innovate and integrate end-to-end groundbreaking front-end and backend processes with groundbreaking design, debugging various tests, and qualification techniques to develop the lowest power per bit solutions to improve customer experience in the field of ML (Machine Learning) and AI (Artificial Intelligence). The success of a sophisticated product such as HBM relies vastly on vertical integration and the various engineering working in unison. To provide greater detail, our HBM technology pertains to stacking numbers of DRAM chips along with a logic chip within one package through an assembly technology called TSV (Through Silicon Via). This greatly increases the memory density in a package, while allowing very high-speed signal transmission. Furthermore, high bandwidth is an outstanding memory design area where custom gate-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only. Lastly, verification and testing (validation) of HBM is the most ambitious due to the total size of the design and complexity of the functions, and in addition to craft, many innovations are needed for verification and validation of the HBM product, thereby making it uniquely exciting.

Main Responsibilities:

Cross-Functional Collaboration: Key interface between Design, Manufacturing, Test and Quality internal departments as well as external customers. Internal collaboration with PE teams will be crucial as well.
Perform Validation Work on Testmodes and Design using simulation, data analysis, and ATE/bench analysis.
Root Cause Understanding and Resolution of Manufacturing, Test and Quality related issues through hardware and software debugging in the lab, circuit simulations and data analysis.
Promotion of Innovation and Challenge Status Quo: Having an innovative approach that is open to improving upon any of our procedures or products. This is vital for maintaining Micron's competitive edge in the market.
Data Analysis for Validation: Utilizing in-house statistical tools for engineering data analysis for validation and risk assessment provides valuable insights into the performance and reliability of the products.
Understand of JEDEC specifications for HBM and creating internal architecture documentation. And schematic & layout knowledge of our design.
Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one's scope of work.

AI Responsibilities:

Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.
Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one's scope of work.

Requirements:

Bachelor's or Master's degree in Electrical & Electronics Engineering, or a related field, or equivalent experience.
3+ years of relevant experience.
Strong knowledge of VLSI, semiconductor process, and basic device physics.
Exposure to Schematic, Simulation, Data Analysis, Lab Debug or Pattern Manipulation.
Experience with either: Verilog, VHDL, or System Verilog
Excellent in problem-solving and analytical skills
Self-motivated and passionate to learn and excel in a fast-paced environment.
Ability to work effectively in team-based projects, contributing to shared goals and outcomes.

Engineer/Senior Engineer - HIG HBM - PE Design Validation