Pcie, Debugging, cdc, regression management, coverage-driven methodologies, AMBA protocols, WLAN MAC verification, Uvm, assertion-based verification, systemverilog, RDC analysis, Axi, IEEE 802.11 standards, APB, EDA Tools, AHB

Python), Universal Verification Methodology (UVM), test environments , scoreboard , Scripting languages (Perl, C, C++, Soc Architecture, Shell, Verilog, Test Cases, Sequencers, Mixed signal designs, Debugging RTL and Gate simulations, Industry-standard simulators, Agents, Revision control systems, Verification testbenches, Testbenches, Regression systems, Verification methodology, Directed and constrained random verification methodology, Monitors

Rtl Design, high-speed interfaces, thermal monitoring integration, power management, micro-architecture, clock-gating, systemverilog, reset-domain architecture, embedded microcontroller integration

rtl development , nand flash , Bash, FPGA Design, Pcie, Verilog, Python, Tcl, Vivado Design Suite, DDR3/4, VHDL, Xilinx FPGAs, ChipScope ILA, C/C++, Embedded firmware development

hardware engineering , Static Timing Analysis (STA), Automation, Deep sub-micron technology, Multi-voltage domains, Circuit Design, Power gating, UPF, Physical Design, Synthesis, ASIC design flows, Sign-off optimizations, PNR, device physics, Low power design implementation