Jtag, C, Verilog, Python, Tcl, VHDL, debug scopes, analyzers, protocol tools, RTL, systemverilog

systems architecture , Qt, C, C++, Application Architecture, Cybersecurity, Embedded Software, QML, Linux, middleware, Python, risk management, reusable platform technologies, Quality Systems, embedded Linux architecture, design controls, medical-device development

Continuous Integration/Continuous Delivery (CI/CD), Java, TestNG, Security Testing, JUnit, Bug Tracking, Api Testing, Selenium, Python, Testing Methodologies

Verilog, Shell scripting, Python, Tcl, Synopsys ZeBu platforms, SoC architectures, Uvm, systemverilog

C, C++, Pcie, Ethernet, Python, Protocol analyzers, System level software and firmware, High-speed IO, Validation principles, Board level schematics, Bit error rate testers, Debug board and hardware software requirements, Logic analyzers, Post-Silicon validation, High speed oscilloscopes

C, Integration, I2c, Python, Logic Analyzers, Oscilloscopes, Source Measure Units, Electronic Loads, DMMs, PMICs, ASIC Design, Lauterbach debuggers, Power Analyzers, Verification, I3C, Current Probes, SPMI, Validation, Protocol Analyzers

Java, Algorithms, Api Development, data structures, Data Modeling, Python, Sql, Modeling, Statistics

Bluetooth Low Energy (BLE), Qt, C++, Spi, Arm Cortex M3, Linux, C Programming, Boost, Python, 802.15.4, software verification, Fmea, QSR ISO regulations, Free RTOS, MEMS sensors, FTA, DMA, risk management practices

Peripheral Component Interconnect Express (PCIe), Double Data Rate (DDR), C, C++, Python, Soc Architecture, hardware emulation, lab equipment, hardware software integration, functional validation, power characterization, silicon bring-up, layout and debug methodologies, board schematics