Perl, Python, Tcl, Sta, Signoff, SDC development, Physical Verification, EM IR, Timing Closure, Physical design integration, PNR, EDA Tools, Low-power design

Nlp, C, Perl, Python, XPROP, DFI, DDR5, Uvm, GLS, systemverilog, LPDDR5

C, C++, Soc Architecture, Regression Testing, Perl, Verilog, Python, Asic verification, UVM-based verification testbenches, Uvm, Functional coverage, systemverilog, SoC Verification, Verification methodology

automated test equipment, Python, Verilog simulation, Large Language Models, Oscilloscopes, Agentic AI, Generative AI, NAND operations, AI Assistants, probe stations