Debugging, Soc, Digital Signal Processing, Perl, Verilog, Arm, Python, System Verilog, Vlsi, Architect, PortablE, Hardware, Functional Verification, Revolution

boundary scan , Debugging, Linux Shell Scripting, automation, Tcl, Python, Perl, Automotive Ethernet products, SSN, MBIST, DFT instruments, Failure Analysis, make, EDA Tools, TAP controller, EDT, in-house verification tools, LBIST, ATE machine, advanced DFT techniques, occ, industrial simulation tools

layout verification , Java, Python, BCD technologies, planar CMOS, FinFET, EDA Tools, Mentor, Cadence, Analog Mixed Signal modules, Synopsys

memory controllers , storage technologies, C, Python, AI-assisted tools, NAND flash non-volatile memory technologies, embedded firmware software development, memory systems, firmware verification and validation, high-speed signal analysis, debugging and failure analysis, low-level debugging

C, Makefile, Verilog, Arm, Python, Perl, Uvm, DMA Flow Control, systemverilog, Serial Devices, AMBA, RISC-V, Low Power CPF UPF Verification, SoC Verification, AHB, APB, Axi

Firmware, Computer Engineering, Cross Functional Team Building, RTL Synthesis, foundation design, Diagnostics, Working alongside Product Teams, Analog Design, Electrical Engineering, RTL Coding, Simulation, synthesis design, Fault Reporting

cadence schematic capture , VXL, Memory Compiler, submicron processes, CALIBRE, physical verifications, SKILL Programming, LVS, virtuoso, Cadence layout, Xl, ERC, Chip Integration, DRC, Script Programming, Hercules verification tools, Antenna, memory layout design, Electro Migration, Floor-planning, EXL, Analog Layout

Physical Verification (PV) signoff, Ant, Perl, Python, Tcl, PERC, Reliability density fill, TSMC nodes, LVS, make, ERC, Esd, DRC, IC design flow

Silicon Validation, Analog layout considerations, Noise mismatch analysis, Digital calibration techniques, PMIC power management, Correlation to simulation, Battery management, Sensor-interface experience, Spectre, Mixed-Signal verification, AMS simulation tools, characterization, Debug, Lab characterization, Ultra-low-power design, Cadence Virtuoso, Transistor-level design, Silicon bring-up

Perl, Python, Tcl, PERC, LVS, make, Tape Out, Calibre, Physical Verification, ERC, Esd, DRC, Place-And-Route, GDSII