automation, Scripting, scan compression, BSCAN, MBIST, Siemens Tessent, SSN TestKompress, DFT architecture, ATPG, EDA Tools, Synopsys TetraMAX, DFTMAX, LBIST, IJTAG

Python, Clp, Tcl, Perl, JTAG BSCAN, MBIST, LEC, SoC DFT Architecture, Logic and DRC analysis, P1500 implementation, ZERO delay and SDF based scan, ATPG DRC analysis, Memory BIST implementation, Hybrid-TK Compression, LPCT, Stuck at TDF, Scan Insertion, power analysis methodologies, Test coverage debug, JTAG simulations, Bridging Cell-aware iddq fault models, LBIST, iJTAG