Fpga, C, Pcie, Ethernet, Python, Test result analysis, Verilog RTL coding, ESD Latchup HTOL tests, Analyzers, Oscilloscopes, Peripheral chips, High speed SERDES, High speed interface design techniques, UCIe, Debug skills, Lab automation scripts, Schematic and layout level, Bit Error Rate Testers, CXL, Electrical and Protocol Interoperability and Compliance test suites, Protocol Exercisers, Post-Silicon PHY Systems Interop and Compliance testing, Signal and Power integrity checks

FPGA Design, C, Prototyping, Labview, Python, Tcl, FPGA coding, Verilog RTL coding, Pre-Silicon IP SoC Physical Layer Electrical Validation, PCB schematic and layout design, Post-Silicon Physical Layer Electrical Validation

Uart, Spi, Can, Git, Javascript, Uml, Embedded C Programming, SNMP, Tcp/ip, I2c, Web services and API design, BACnet, Modbus, Hardware debuggers, Web-UI development, ARM microprocessor, Secure Development Lifecycle practices

C, Perl, Computer Architecture, Ruby, Python, Assembly start up code, Makefiles, Stimulus generation, Uvm, Testbenches, Pre-silicon verification, Formal verification methods, Linker scripts, Post-silicon FPGA validation

redhawk , Python Scripting, Pvs, Perl, Tcl, QRC, primetime, ICC2, Tempus, Voltus, Innovus, Calibre, Physical Design, Starrcxt

Verilog, Bash, Python, Tcl, systemverilog