UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), C, C++, Shell, Pcie, Perl, Arm, Python, Tcl, Systemc, MCU, Hardware Emulation Platforms, RISC-V, UCIe, systemverilog, Verification Methodology, AMBA, Axi, Formal Model Equivalence Checking Tools, formal verification, VC Formal

Perl, Python, Tcl, Xcelium simulation, vManager, Real-Number Modeling, Verilog-AMS, JasperGold, Uvm, SVA, systemverilog

Garbage Collection, Nvme, Test Strategies, Pcie, Python, Automated reporting systems, Wear levelling, SSD NAND architecture, Qualification methodologies, Test infrastructure, Error Handling and Recovery Flows, Reliability and Endurance Validation, Quality dashboards, Bad block management, Embedded Firmware development, Validation plans, Error injections, NAND Management, Cloud SSD specifications

Tcl, C, Debugging, Shell, Verilog, System Verilog, Python, Perl, directed and constrained random methodologies, UVM methodology, Metric Driven Verification, assertions, formal verification methodologies

Unix Shell, Tcl, Python, Perl, LVS, IC Validator, Cadence Virtuoso, DRC, Calibre, PERC