data mining, Calibre DRC, Data Analysis, solid state physics, EDA Tools, nanofabrication, Virtuoso Layout Suite, semiconductor process fabrication flow, Cadence Virtuoso, Virtuoso Schematic Editor

TCAD process device simulation, lvs check, device tuning techniques, Mentor, Cadence, semiconductor device physics, advanced RFSOI CMOS technologies, drc, device characteristics, Synopsys, Calibration, layout creation

Waveguide routing and optical component layout, DRC LVS verification, Version control systems Git or SVN, GDSII and OASIS layout formats, Mask layout preparation and tape-out flow, Foundry PDK usage

comsol, RF effects, Lumerical, DRC, PDK, Optical communication systems, PIC layout and tapeout flows, LVS, Design and simulation of silicon photonic devices or PICs, Guided-wave optics and device physics