System Integration, Matlab, IC System Partitioning, Routing Tradeoffs, Physical Layout Management, Signal Grounding, Block-level Modeling, Architectural Tradeoff Analysis, AMs, Spectre, Worst-case Identification, Monte Carlo Analysis, Device Physics Knowledge, Simplis, Post-layout Parasitic Extraction, Block-level Topology Selection, Top-level Verification, Schematic Generation

System-Level Trade-off Analysis, IP Integration and Sub-system Ownership, Analog IP Architecture Technical Direction, Silicon Readiness Debug Learning Loop, Analog-Digital Interface Mixed Signal Integration, Analog IP Quality Sign-off Framework, Sub-system Modelling, Simulation Verification, Analog Mixed-Signal Power IC design, Cross-Functional Leadership, Behavioural Modelling, Analog IP Spec Derivation Optimization, EDA Tools, Continuous Technical Review Mentoring, Innovation Circuit Excellence, device physics, Reusable IP Design Methodology