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Key Responsibilities:
Process Integration & Device Physics: Defining and maintaining FEOL/BEOL integration process flows across specialty platforms (BCD, SiPh, High-Voltage, CMOS, MEMS).
NPI & Technology Transfer: Leading technology qualification, baseline process freeze, tool evaluations, and technology transfers between R&D fabs and volume production sites.
Yield & Parametric Optimization: Driving yield learning, inline defect reduction, electrical test (ET/PCM) analysis, and Design of Experiments (DOE).
Cross-Module Problem Solving: Partnering with Photo, Etch, Thin Films, CMP, and QA teams on failure analysis (FA) and root-cause resolution (8D, PFMEA).
Qualifications:
Education: Degree / Master's / Ph.D. in Microelectronics, Electrical Engineering, Physics, or Materials Science.
Experience: 8+ years (Staff) or 12+ years (Principal) in wafer fab process integration, yield learning, and device engineering.
If you are interested in exploring this role, or if you have relevant industry contacts who might be interested, please reach out directly with a CV to: [Confidential Information]
EA: 94C3609 | R22105422
Job ID: 153366855