SoC Design Verification Manager

Role Overview

This role leads and drives a high-performing design verification team responsible for delivering robust, zero-defect SoC and ASIC solutions. The position focuses on advancing verification methodologies across increasing design complexity while ensuring high-quality, on-time execution through strong technical leadership and structured verification planning.

Key Responsibilities

• Lead and manage a verification team developing advanced methodologies across UVM, C/C++ co-simulation, system emulation, mixed-mode simulation, and formal verification.
  
• Define, review, and execute comprehensive test plans with full coverage and high-quality standards.
  
• Drive systematic verification strategies to achieve zero-defect silicon.
  
• Oversee verification flow development aligned with ASIC and SoC design methodologies.
  
• Ensure effective IP integration and system-level verification.
  
• Promote disciplined execution, continuous improvement, and technical excellence within the team.
  

Ideal Requirements

• MSEE/BSEE in Electrical or Computer Engineering with 10+ years of relevant experience.
  
• Strong expertise in SoC architecture, IP integration, and system-level verification.
  
• Deep knowledge of UVM verification methodology.
  
• Hands-on experience with ASIC verification flows and EDA tools.
  
• Proficiency in C and/or scripting languages such as Python or Perl.
  
• Proven team leadership and strong communication skills.
  
• Experience in RTL design is an advantage.
  
• Background in video processing or video analytics is a plus.
  
• Strong general programming capability is highly valued.
  

If you would like to be considered for this opportunity, please forward a copy of your full CV to [Confidential Information]

Data provided is for recruitment purposes only. Only shortlisted candidates will be notified.

Business Registration Number : 200611680D | Licence Number : 10C5117 | EA Registration Number: R25127614