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Senior Staff Silicon Design Engineer - RTL

8-11 Years
SGD 11,270 - 14,090 per month
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  • Posted 22 hours ago
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Job Description

THE ROLE:

AMD is seeking a talented and self-driven digital design engineer to join the SerDes Technology group, where you will contribute directly to the architecture and implementation of next-generation high speed interface technologies. You will be part of the team developing SerDes/Transceiver designs and solutions. The role involves work on all aspects of the FPGA/ASIC digital design flow including architectural specification, test planning, RTL design, functional verification, through synthesis and implementation to hardware and post silicon validation.

THE PERSON:

You will execute design work and contribute technically with a high general impact on the overall design. We are seeking someone who is innovative, highly accurate and detail-oriented, possessing good communication and problem-solving skills to join our design team.

KEY RESPONSIBILITIES:

  • Architecture, design, and development of complex digital logic blocks in leading edge technology nodes.
  • DFT implementation and verification.
  • Perform test bench development and functional verification of developed digital logic blocks.
  • Perform post silicon validation, testing and debug of block functionality on prototype silicon.
  • Work closely with system architect, project manager, design and verification teams to develop design specifications documents, verification plans, and validation test plans.

PREFERRED EXPERIENCE:

  • Experience in ASIC/digital IC development with completion of several complex ASIC or IC production tapeouts.
  • Proven experience across RTL design in Verilog/VHDL, functional verification, synthesis and DFT, applied to complex high performance design.
  • Strong understanding of the end‑to‑end digital ASIC design flow, from RTL architecture through sign‑off methodologies.
  • Excellent verbal and written communication skills. Strong interpersonal skills.
  • Problem solving and debugging skills.
  • Knowledge of UVM and SystemVerilog language.
  • Experience using AI‑assisted tools to support engineering productivity and workflow efficiency.

ACADEMIC CREDENTIALS:

  • Bachelor or Masters Degree in Electronic Engineering, with years relevant work experience.

LOCATION:

Singapore

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Job ID: 146146551

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