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Senior / Staff Physical Verification CAD Engineer

2-4 Years
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  • Posted 7 hours ago
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Job Description

Job Description :

1. Co-work with PDK team to code and maintain DRC/LVS/ANT/ERC/LPE/ESD rule deck for various processes 2. Develop layout implementation flow and physical verification flow 3. Co-work with QA team to reduce the PDKs/Rule deck defects 4. Perform full-chip physical verification such as debugging DRC/LVS/ERC 5. Implement automation scripts in C-shell, Python and Perl

Job Requirement:

1. Bachelor/Master's Degree in Electrical / Electronics Engineering / Computer Science 2. Familiar with IC Design front-to-backend flow 3. Familiar with interposer design, TSV technology and chip stacking techniques such as CoWoS or EMIB with 2.5D and 3D ICs experiences. (Must have) 4. Preferably well-versed in Calibre, ICV 5. Proficient in script programming, such as, Tcl, Perl or C-shell 6. Proficient in UNIX (Linux) platforms 7. Strong communication skills, problem solving and analytical skills

Job ID: 143849421