Senior Silicon Design Engineer (FPGA)

THE ROLE:

As a member of the SoC Physical Integration team, you'll interface with various engineering groups, including architecture, design, CAD, software, and product engineering, across various geographies to work towards the physical/electrical verification and tape out of AMD SoC FPGA/ACAP devices.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES:

Common essential duties and responsibilities include, but are not limited to:

• Defining and developing flows and methodologies for chip level integration
• Developing tools for design verification or efficiency
• Designing (RTL and custom), verifying, and integrating FPGA/ACAP sub-blocks
• Coordinating activities between different design groups to ensure smooth integration
• Executing chip level physical verification
• Executing chip level electrical verification

PREFERRED EXPERIENCE:

• Experience in SOC FPGA or ASIC devices or equivalent
• Basic understanding of FPGA architecture
• Knowledge of and/or experience with design and verification tools such as Virtuoso and Calibre
• Knowledge of and/or experience with P&R tools
• Fundamental circuit design knowledge including simulation experience with Spice and Verilog
• Strong debug skills
• Scripting experience using Perl, Python, TCL, C-shell, Make and/or other scripting languages
• Knowledge and experience with basic Unix data management and job control
• Excellent written and oral communication skills

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in Electrical /Computer Engineering