Senior Physical Layout Engineer

Job Description Summary: Design analog/mixed-signal layouts ensuring performance and quality meet project requirements.

Job Description

Responsibilities and Duties include but not limited to:

. Perform block level floor-planning.

. Create and develop layout from design schematics in accordance with requirements.

. Work closely and communicate effectively with multi-functional teams fromvarious sites.

. Perform block level layout & conduct all physical & reliabilityverifications (DRC/LVS/ERC/etc.) on the layout designs.

. Take the lead in developing macro-blocks and top-level layouts, including scheduling, floor-planning, verification, and tape-out.

Requirements:

. Bachelor's degree in Electronics Engineering or equivalent.

. 5+ years of relevant experience in the field.

. Strong knowledge of semiconductor physics and advanced layout techniques.

. Excellent command of Cadence Virtuoso Suite (XL, analog router, etc.) and Calibre verification tools (LVS, DRC, ERC, ANT, PERC, Extraction, EM, etc.).

. Familiarity with best-known layout practices: device matching, critical net shielding, EM, ESD, latch-up, HV & power FET layout, assembly constraints, multi-well isolation.

. Experience managing complex projects and leading teams.