Senior Member of Technical Staff – RRAM Technology and Architecture

This position requires deep hands‑on expertise combined with system‑level thinking, strong technical judgment, and the ability to influence cross‑functional teams and senior stakeholders.

Key Responsibilities

• Define and own RRAMbitcelland macro architecture, including scaling strategies, array topology, sensing schemes, redundancy, and robustness margins.

• Lead architecture trade‑offs balancing performance, power, area, variability, endurance, and retention for product‑level requirements.

• Partner with circuit and SoC(design)teams to ensure seamless macro integration into customer designs.

• Set technical direction for RRAM stack layer optimization, including material selection, interface control, thickness scaling, and variability reduction.

• Drive deep understanding of RRAM switching physics, forming mechanisms, defect engineering, and reliability failure modes.

• Work closely with process integration teams to ensure compatibility with advanced BEOL/FEOL flows and cost‑effective manufacturing.

• Own definition and optimization of electrical test conditions, including forming, set/reset algorithms,readmethodologies, and stress conditions.

• Define the associated RRAM ET parameters target and specification.

• Lead comprehensive DC/AC characterization, array‑level analysis, and qualification strategies to meet product and customer reliability requirements.

• Drive silicon learning, root‑cause analysis, and yield/reliability improvement based on statistical data and failure analysis.

• Act as the primary technical decision‑maker for RRAM programs, resolving complex cross‑disciplinary trade‑offs.

• Guide multiple project teams from early concept through silicon validation, product qualification, and technology transfer.

• Represent RRAM technology in executive reviews, customer engagements, and technical forums.

• Mentor and junior engineers, building long‑term RRAM technical depth within the organization.

• Establish best practices, design guidelines, and institutional knowledge for scalable RRAM development.

Required Qualifications

• PhD or MS in Electrical Engineering, Materials Science, Physics, or related field with 12+ years of RRAM or emerging NVM development experience.

• Recognized expert in RRAM device physics, stack engineering,bitcell/macro design, and reliability characterization.

• Proven track record of driving RRAM technologies into silicon platforms or products.

• Strong leadership, communication, and cross‑functional influence skills.