Senior Hardware Engineer - Physical Layer

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world. Our culture thrives on finding new and better ways to accelerate what's next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.

Job Description:

Senior Hardware Engineer - Physical Layer (R&D Networking Platforms)

Design at scale. Drive standards‑based innovation. Power the world's networks.

At Hewlett Packard Enterprise (HPE), Senior Engineers don't just execute designs-they shape platforms, influence architecture, and drive technology forward. If you are an experienced Physical Layer engineer who thrives on high‑speed communication challenges and wants your work deployed at global scale, this is your opportunity.

HPE is a global technology leader built on innovation, trust, and technical excellence. We invest in experienced engineers by giving them meaningful technical ownership, exposure to advanced technologies, and the autonomy to solve complex real‑world problems. You'll collaborate with highly skilled peers in an environment that values sound engineering judgment, continuous learning, and long‑term career growth.

Why HPE Networking
HPE Networking is one of our fastest‑growing and most strategic businesses, delivering open, standards‑based networking solutions across Branch, Campus, and Data Center environments worldwide. Our products support customers ranging from growing enterprises to the world's largest hyper-scalers. As a senior member of the Physical Layer team, your work will directly influence link performance, standards compliance, interoperability, and system reliability across next‑generation Ethernet switches and networking platforms.

We are seeking a Senior Hardware Engineer (Physical Layer) to join our R&D organization, working on advanced networking systems where Ethernet PHYs, high‑speed serial interfaces, and front‑end signal integrity truly matter.

This is a role for engineers who want to lead technically, influence standards, and see their work shipped at scale.

HOW YOU'LL MAKE AN IMPACT

As a Senior Hardware Engineer (Physical Layer), you will play a key technical role within a highly experienced R&D platform team, contributing across the full product development lifecycle with a focus on Physical Layer and front‑end technologies.

You will:

• Collaborate with hardware design teams on the architecture, design, and implementation of Physical Layer and front‑end solutions for Ethernet networking platforms.
• Work closely with silicon and optics vendors to define product requirements, evaluate components, and resolve interface and interoperability issues.
• Develop and execute test methodologies to support current and next‑generation IEEE 802.3 Ethernet standards.
• Perform and evaluate parametric, compliance, and characterization testing on PHY devices and optical/copper transceivers.
• Develop and optimize physical layer performance, addressing link margin, noise, signal integrity, and interoperability challenges.
• Actively participate in or support industry standards activities (e.g., IEEE 802.3), representing product and system requirements.
• Diagnose and resolve complex system‑level issues involving high‑speed links, encoding schemes, and front‑end signal behaviour.
• Partner closely with SI, verification, firmware, and system teams across global sites to deliver production‑ready designs.
• Mentor junior engineers and contribute to continuous improvement of PHY design, validation, and test methodologies.

Why This Role Stands Out

• Deep technical ownership of Ethernet Physical Layer design and validation
• Direct influence on standards compliance and next‑generation connectivity
• Exposure to cutting‑edge speeds (50G, 100G, 200G and beyond)
• Collaboration with top‑tier engineers, vendors, and standards bodies
• Opportunity to ship enterprise‑class networking products at global scale
  

About You

• Bachelor's degree in Electrical or Electronic Engineering (advanced degree preferred), ideally with specialization in digital data or optical communications.
• Strong experience in Ethernet networking technologies and standards, including 10/100/1000 Mbps, 10Gbps, 25Gbps, 40Gbps, and 100Gbps systems.
• Hands‑on experience with Physical Layer devices, high‑speed serial interfaces (XAUI, XFI, 25GAUI, XLAUI, CAUI‑4), and encoding schemes such as MLT‑3, NRZ, and PAM4.
• Experience working with optical and copper transceivers and correlating performance across system‑level implementations.
• Solid understanding of signal integrity challenges, including PCB effects on isolation, SI, and PI performance.
• Strong analytical and debugging skills, with a proven ability to resolve complex physical‑layer issues.

Additional Preferred Abilities

• Excellent interpersonal skills with the ability to work effectively in both collaborative team environments and independently.
• Demonstrated ability to make sound, autonomous decisions in technically complex situations.
• Strong relationship‑building skills with the ability to collaborate across cross‑functional teams self‑motivated, proactive, and an effective listener.
• Outstanding written and verbal communication skills, with fluency in English and the local language able to clearly articulate product architectures, present design proposals, and effectively discuss and negotiate technical options with senior management and stakeholders.