Senior/ Engineer, Yield & Process Integration

Responsibilities:

• Focus on process yield engineering and bump process integration. Collaborate with cross-functional teams to troubleshoot and resolve process-related issues observed during the wafer bumping process (both Dry and Wet), including the proposal and execution of Design of Experiments (DOEs)
• Responsible to look into data analysis for yield and detect trend
• Lead continuous improvement projects & device qualifications using APQP approach
• Execute CIP (Continuous Improvement Program) or project handling that contributes yield & cost efficiency improvement
• Review and propose updates to calculated Statistical Process Control (SPC) limits to improve product quality and ensure process stability
• Take ownership of customer technical inquiries, perform detailed spec reviews, and lead the implementation of requirements for product offload transition from New Product Introduction (NPI) to mass production.
• Overall coordinator of customer's initiated BKM exercise

Requirements:

• Degree in Engineering
• Minimum 3 years of relevant experience preferably in the semiconductor industry
• Familiar with SPC, APQP, and data analysis tools
• Strong problem-solving and analytical skills