Senior Engineer - Product Development Engineer (ATE/ DFT/ FUSE)

THE ROLE:

The Senior Engineer is responsible for the test solution for a next-generation AMD Product. This position serves as the Test Engineering team's technical point of contact and go-to expert for ATE Fuse solutions. This position requires engagement with Product, Design, Security Experts, Platform Engineering, Device Analysis, Quality and Reliability Engineering to attain test and characterization plan, 1st silicon bring-up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next-generation AMD products.

THE PERSON:

We are looking for somone who has a passion towards technical development, possesses broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points.

The role requires someone who is independent, self-starter, well organized and have the sense of responsibility to see projects through beginning to the end. Market awareness, adaptability to a fast-paced, multi-tasking environment, and a collaborative mindset are essential.

KEY RESPONSIBILITIES:

Key responsibilities for this role will differ according to the product life cycle and are as below:

New product introduction phase:

• Developing characterization and test coverage strategies/plans during pre-silicon phase
• Establishing pattern requirements and driving Design Verification deliveries during pre-silicon phase
• Executing the defined characterization and test plans on new silicon
• Design Wafer and Package Level Fuse modules for Test Programs
• Silicon Bring up and Post Silicon ownership including validation of Test Programs
• Perform new device characterization, circuit sensitivity analysis, interpret findings, guide deep-dive investigations to root-cause, and/or provide mitigation actions.
• Interface with global teams across the organization on root cause resolution for device failures.
• Foster and develop new ideas/concepts in device test/debug/DFT/DFM and follow-through to deliverable outcomes.

Product health and cost target attainment during production phase:

• Optimize test contents to meet/exceed business goal
• Lead effort to optimize product margin to meet business requirements, from Fab to Back-end-Test.

PREFERRED EXPERIENCE:

• At least 7 years of experience in the Semiconductor industry
• Experience must include technical and specialized knowledge in the areas below:
  • Strong DFT and ATE test methodologies.
  • End to end ATE Test Prog development, validation and Debug skills including Pre and Post Silicon
  • Fuse and Security module development.
  • Pattern development and debug experience in Fuse desired.
  • Strong ATE & test class/method development experience with Advantest 93k preferred.
  • Test development experience of more than 1 full product cycle is preferred.
  • Strong Python/Java/Perl/C++ coding skills
  • Experience with Mentor or Synopsys or Cadence EDA tools or System Level Testing a plus

ACADEMIC CREDENTIALS:

• Bachelor/Master in Electrical/Electronic Engineering

LOCATION:

Singapore