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Senior Analog Layout Engineer

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Job Description

About Marvell

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As an Analog Layout Senior Staff Engineer with Marvell, you'll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You'll be part of a small analog team making a big impact on this organization. Additionally, Marvell has the perfect size and scale for you to learn several aspects of engineering that will be new to you, but also have the time and freedom to dive deep into the details of your specialization on most projects.

What You Can Expect

  • Work closely with global engineering teams across Argentina, Singapore, the U.S., and Europe, contributing to collaborative, internationally distributed projects.

  • Support layout verification and simulation activities using Cadence Virtuoso, partnering closely with analog designers to iteratively refine, debug, and improve layouts until design specifications are met.

  • Participate in projects ranging from a few months to approximately 18 months, with flexibility to move between projects as priorities evolve and new opportunities arise.

  • Engage in regular one-on-one and team meetings with your paired analog designer, ensuring clear communication, effective information sharing, and smooth day-to-day collaboration in line with Marvell's teamwork-driven culture.

  • Contribute as an active member of the layout and project teams throughout the full project lifecycle, attending routine technical meetings to provide progress updates and discuss layout-related issues.

  • With guidance from senior engineers, assist in identifying, presenting, and addressing layout challenges, helping communicate solutions or learnings encountered during the development of advanced technologies.

What We're Looking For

To be successful in this role, you must have:

  • Hands-on experience or academic exposure to analog or mixed-signal IC layout, including familiarity with physical implementation layers (diffusion, poly, metal, vias), beyond schematic-level design.

  • Exposure to layout of high-speed or precision analog circuits, gained through coursework, internships, or early-career project work.

  • Working knowledge of the physical design flow, including floorplanning, layout implementation, and basic verification steps such as DRC and LVS.

  • Experience contributing to layouts at different hierarchy levels, such as individual devices, small cells, or functional blocks, with guidance from senior engineers.

  • Awareness of key analog layout techniques, such as matching, symmetry, guard rings, shielding, and basic parasitic considerations, with willingness to learn and apply best practices.

  • Good communication and teamwork skills, enabling effective collaboration with analog designers, verification engineers, and global teams in a learning-focused environment.

  • A solid foundation in electrical engineering concepts, typically through a degree in Electrical or Electronic Engineering, with basic understanding of analog circuits and device behavior.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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About Company

Marvell Technology, Inc. is an American company, based in Delaware, which develops and produces semiconductors and related technology. Founded in 1995, the company had more than 6,000 employees as of 2013,[2] and 10,000 patents worldwide and annual revenue of $2.9 billion (FY19). Its U.S. headquarters is located in Santa Clara, California

Job ID: 144494873