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Main Responsibilities
. Design layout for analog, digital andmixed-signal circuits.
. Own layout of major custom IP blocks.
. Work closely with analog designers on floorplanning and layout implementation.
. Physical and electrical verificationinclude DRC, LVS, EM/IR, ERC, PERC Latch up and PERC ESD
. Review resource deliverables and ensurequality/milestone completion.
. Plan schedules and drive assigned blocks tomeet project timelines.
Main Requirements
Job ID: 153716925
Skills:
Ant, Mentor Calibre, LVS, Latch-up, EMIR, CMOS circuit theory, Esd, ERC, DRC, isolation techniques, analog layout design, clock shielding, Cadence Virtuoso, Reliability
Skills:
Tcl, PERL, Skill, CALIBRE DRC, Cadence Tools