About Silicon Photonics Business Division
Delta Silicon Photonics Business Division develops world-class silicon photonics chips and solutions that power next-generation sensors and intelligent systems. Our mission is to deliver smarter and safer environments — from machines and infrastructure to everyday life — by translating advanced silicon photonics into real-world impact that benefits people. We are a future-focused, innovative, and entrepreneurial team driven by deep technology expertise, bold execution, and a strong sense of purpose.
What You'll Be Doing
As a Principal Scientist for Photonic-Electronic Co-Design & Packaging, you will be the visionary architect responsible for the physical and functional convergence of our most advanced integrated systems. This is a high-impact role where you will explore the scientific boundaries of how light and electronics interact at the chip scale.
You will move beyond traditional packaging to pioneer multi-domain co-design, solving fundamental physics challenges such as thermal-mechanical stress in 3D stacks, high-speed signal integrity in silicon interposers, and the optimization of high-density photonic-electronic interfaces. Your work will define the blueprint for our future sensor engines, ensuring they are not only scalable but represent the state-of-the-art in heterogeneous integration.
What It's Like Working With Us
You'll work in a highly technical, fast-moving environment where problems are complex and solutions are not always predefined. Collaboration is essential across engineering, product, operations, and supply-chain teams, and progress depends on clear thinking, trust, and ownership.
We value curiosity and continuous learning, and we expect team members to be comfortable navigating ambiguity, testing assumptions, and improving through iteration. People here are encouraged to take initiative, learn quickly from both successes and setbacks, and shape how work gets done.
Key Technical Responsibilities
- Scientific Architecture of Multi-Chip Systems: Lead the conceptual and physical architecture of massive high-I/O systems (500 to 10,000+ channels). You will develop the scientific framework for PIC-EIC co-integration, optimizing for signal fidelity, power density, and optical alignment stability.
- Advanced Integration Research: Drive the research and implementation of next-generation interconnect technologies. You will serve as the technical authority on the application of TSVs, Hybrid Bonding, and Silicon/Glass Interposers, evaluating the physical trade-offs of each for coherent sensing applications.
- Co-Optimization of Photonic-Electronic Interfaces: Partner with design scientists to establish new paradigms for high-speed electrical interconnects and waveguide layouts. You will ensure that the physical implementation preserves the integrity of coherent optical signals while managing the electromagnetic complexities of high-density electronic routing.
- Cross-Functional Technical Synthesis: Act as the bridge between theoretical optics and microelectronic implementation. You will translate system-level physics requirements into rigorous physical design rules, ensuring that the sensor's optical performance is enhanced, not hindered, by its packaging.
- Strategic Supplier & Foundry Collaboration: Technical leadership in qualifying OSAT and Foundry partners for emerging assembly technologies. You will lead Design-for-Manufacturing (DfM) and Design-for-Test (DfT) from a scientific perspective, ensuring that new integration methods are robust enough for commercial scaling.
Required Technical Qualifications
- Education: Ph.D. in Electrical Engineering, Applied Physics, Photonics, or Materials Science with a focus on advanced semiconductor integration.
- Core Scientific Expertise:
- Significant experience (7+ years preferred) in advanced packaging research or complex heterogeneous system co-design.
- Deep understanding of the physics of high-density interconnects (≥500 I/O) and the mechanical/thermal implications of 2.5D and 3D integration.
- Strong background in Silicon Photonics (SiPh), specifically regarding how packaging materials and processes affect optical phase stability and propagation loss.
- Modelling & Simulation Skills:
- Familiarity with si photonics design and simulations.
- Expertise in analysing signal integrity (SI) and power integrity (PI) at the chip-package interface.
- Familiarity with thermal-mechanical co-simulation and its impact on photonic device performance.
- Familiarly with optical subassembly and packaging.
- Software Proficiency: Mastery of photonics simulation tools (e.g., Lumerical) and IC layout environments.
- Mastery of IC and packaging layout environments (e.g., Cadence Virtuoso, Allegro X Advanced Package Designer, or similar advanced 3D-IC tools).
