Our client in the semiconductor industry is looking for a highly experienced PCI Express (PCIe) Validation Expert to lead pre- and post-silicon validation efforts for next-generation high-speed storage accelerators.
In this role, you will own end-to-end PCIe validation, ensuring high performance, standards compliance (PCIe Gen3/Gen4/Gen5/Gen6), and robust interoperability across a diverse ecosystem. You will collaborate closely with cross-functional teams including architecture, design, firmware, PHY, and system engineering to define validation strategies, debug complex issues, and deliver high-quality silicon to production.
Key Responsibilities
- Own and drive PCIe validation strategy and execution across pre-silicon and post-silicon phases
- Define comprehensive validation coverage plans across protocol, link, PHY, power management, and compliance scenarios
- Lead PCIe link bring-up, training, and tuning across multiple generations (Gen3/4/5/6)
- Perform deep debugging using protocol analyzers, oscilloscopes, and logic analyzers
- Drive PCI-SIG compliance testing, including both electrical and protocol validation
- Ensure interoperability with server CPUs and platforms from leading industry vendors
- Develop and enhance automation frameworks using Python, C/C++ to improve validation efficiency and scalability
- Own and manage Functional Circuit Test (FCT) and In-Circuit Test (ICT) processes
- Lead RMA analysis, working closely with customers and manufacturing teams to resolve board-level issues
- Collaborate closely with Architecture, Design, Software, and Signal Integrity teams
- Coordinate test program development and automation script execution
- Mentor and coach junior engineering staff
Qualifications
- Bachelor's degree or higher in Computer Science, Computer Engineering, Electrical/Electronic Engineering, or a related field
- 10+ years of experience in silicon or system validation with a strong focus on PCIe
- Proven experience in system validation for complex SoC environments
- Deep understanding of the PCIe protocol stack (Transaction, Data Link, and Physical layers), including link training, equalization, and power management
- Strong hands-on experience with PCIe analyzers, oscilloscopes, and signal integrity tools
- Expertise in hardware/software co-debugging and complex system issue resolution
- Experience with high-speed SerDes tuning and validation methodologies
- Hands-on experience in system board bring-up, design debugging, and lab equipment usage
- Solid understanding of high-speed interface system/electrical validation
- Proficiency in C/C++ and scripting languages (e.g., Python) for test automation
- Strong problem-solving skills with a structured, methodical approach
- Highly proactive, self-motivated, and a strong team player
Preferred Qualifications
- In-depth expertise in PCIe Gen3/Gen4/Gen5 (Gen6 is a plus)
- Experience in storage and/or networking domains
- Knowledge of data compression and cryptographic algorithms
