Job Title: Physical Design Engineer Intern
Job Overview: We are seeking a detail-oriented and enthusiastic Physical Design Engineer Intern to contribute to the layout and implementation of high-performance integrated circuits. This internship will provide practical experience in various stages of the physical design flow, including floor planning, placement, routing, and physical verification, under the guidance of experienced engineers. The ideal candidate will have a basic understanding of VLSI concepts and a strong interest in the physical realization of chip designs.
Key Responsibilities:
- Assist in floor planning activities to understand area and performance considerations.
- Learn about cell placement and routing methodologies.
- Contribute to the design and analysis of power distribution networks.
- Participate in design rule checks (DRC) and layout versus schematic (LVS) verifications.
- Gain exposure to industry-standard physical design tools (e.g., Synopsys IC Compiler, Cadence Innovus).
- Assist in the development and use of scripting for basic automation tasks.
- Collaborate with senior engineers on various physical design tasks.
Qualifications:
- Currently pursuing a Master's or PhD degree in Electronics Engineering, Electrical Engineering, Computer Science, or a related field.
- Basic understanding of VLSI design concepts and physical design fundamentals.
- Interest in learning about floor planning, placement, and routing.
- Familiarity with basic programming or scripting concepts.
- Strong attention to detail and problem-solving skills.
- Good communication and teamwork abilities.