Role Overview
Broadcom's Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design and verification of a broad range of IP and I/Os, including leading-edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly collaborative culture, the role offers opportunities for growth and development.
Responsibilities
- Design of CMOS I/O, high-precision bandgap references, op-amps, comparators and power-on-reset circuits.
- Run simulations to validate AC/DC performance, signal integrity, jitter and power.
- Perform transistor reliability and EMIR analysis.
- Work closely with layout teams to oversee physical design and verification.
- Build Verilog, Synopsys Liberty and IBIS models.
- Create and maintain detailed technical documentation, including datasheets, application notes and integration guides.
- Support chip-level integration and silicon bring-up in test chips and customer products.
Technical Skills and Requirements
- MS or PhD in Electrical Engineering.
- 6+ years of I/O or analog circuit design experience.
- Deep proficiency in Cadence Virtuoso Schematic/Layout capture and SPICE/Spectre circuit simulation.
- Solid foundation in I/O protocols including GPIO, I2C, I3C, eMMC, RGMII and SPMI.
- Familiarity with ESD, EMI and Signal Integrity.
- Experience with advanced CMOS FinFET and GAA process nodes, including features, technology limitations and PPA tradeoffs.
