Front-End Digital IC Designer

Job Summary

The Front-End Digital IC Designer is responsible for the design, development, and verification of digital integrated circuits from architectural definition through RTL implementation and functional verification. The role focuses on translating system requirements into efficient, synthesizable RTL designs and ensuring the design meets performance, power, and area (PPA) targets.

Key Responsibilities

RTL Design

• Develop and implement synthesizable RTL code using Verilog/SystemVerilog based on system and micro-architecture specifications.
• Design digital blocks such as I2C, XSPI, datapaths, DMA controllers and industrial standards interfaces and buses.

Architecture & Micro-architecture

• Participate in defining micro-architecture and design specifications.
• Evaluate trade-offs between performance, power, and area (PPA).

Functional Verification Support

• Able to build self-test environment to verify the key functionality of IP before handling over to the verification engineer.
• Collaborate with verification engineers to create test plans and ensure complete coverage.
• Support simulation, debugging, and root-cause analysis of design issues.

Design Integration

• Integrate IP blocks and ensure correct functionality within the SoC environment, define clear constraint for your IP
• Work closely with architect , RTL2GLN , and backend design teams to ensure.

Synthesis & Linting

• Run synthesis and static checks such as linting, CDC (Clock Domain Crossing), and reset domain checks.
• Ensure RTL quality meets design guidelines and coding standards like spyglass checks.

Documentation

• Prepare design documentation including micro-architecture specifications, block diagrams, and design reports.
• Maintain clear version control and design traceability.

Cross-functional Collaboration

• Work with backend engineers for timing closure and design optimization.
• Support silicon bring-up, debugging, and post-silicon validation when required.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
• 3 to 5 years of experience in digital IC design (entry-level roles may accept fresh graduates).
• Strong knowledge of digital design fundamentals (FSM, pipelining, clocking, reset strategies).
• Proficiency in Verilog/SystemVerilog RTL design.
• Experience with simulation and debugging tools.
• Understanding of ASIC/SoC design flow.

Preferred Qualifications

• Experience with EDA tools such as Synopsys, Cadence, or Siemens EDA tools.
• Familiarity with low power design techniques (UPF/CPF).
• Knowledge of DFT (Design for Test) concepts.
• Experience integrating standard interfaces such as AXI, AHB, SPI, I2C, or PCIe.
• Basic scripting skills (Python, Perl, or TCL).

Key Competencies

• Strong analytical and debugging skills
• Attention to detail in digital logic design
• Ability to work in cross-functional engineering teams
• Good documentation and communication skills