About the company:
We have partnered with a renowned global leader in information and communications technology (ICT) infrastructure and smart devices. They are providing full-stack, all-scenario solution for products and services carriers, enterprises, governments, and individual consumers worldwide.
Our client is looking for an Automotive Physical Design Principal Engineer to join the team.
Job Description
- Responsible for the physical design of automotive-grade SoC chips; leading the full-flow implementation from RTL to GDS to ensure compliance with functional safety (ISO 26262) requirements.
- Collaborate with the front-end design team to participate in architecture evaluation, logic synthesis, and power optimization, with a focus on enhancing the timing, area, and power efficiency of CPU cores.
- Lead the construction of PPA (Power, Performance, Area) competitiveness, achieving technical breakthroughs through advanced process nodes and customized optimization strategies.
- Responsible for tackling technical challenges in physical design, including timing closure, signal integrity (SI), power integrity (PI), and yield enhancement.
- Introduce and validate new technologies and tool chains, driving continuous innovation in physical design methodologies for automotive-grade chips.
Job Requirements
- Bachelor's degree or above in Microelectronics, Electronic Engineering, Computer Science or a related field.
- Proficiency in digital chip back-end flows, including Place & Route (P&R), Static Timing Analysis (STA), and power analysis; basic understanding of digital front-end design and RTL synthesis.
- Proven experience in physical optimization for high-performance cores (e.g., CPU/GPU), with familiarity in low-power design methodologies; deep understanding of functional safety specifications and the ability to implement ISO 26262 requirements into the physical design stage.
- Expert-level command of mainstream EDA tools (such as Innovus, ICC2, PrimeTime, Voltus, etc.) and mastery of the physical verification (DRC/LVS/ERC) flow.
- 5+ years of experience in automotive-grade SoC physical design, with a track record of leading at least two mass-produced projects that achieved commercial success.
