ATE Test Engineer (Scan / ATPG)

Job Responsibilities

• Develop, debug, and bring up Scan ATPG test patterns on ATE platforms.
• Perform ATE test program development and validation during new product introduction (NPI).
• Debug scan test failures and analyze yield issues.
• Support pattern bring-up, correlation, and production release activities.
• Perform silicon characterization and electrical validation.
• Drive test time reduction and test optimization to improve manufacturing efficiency.
• Work closely with DFT, design, product, and validation teams to resolve test issues.
• Support failure analysis and root cause investigation for production problems.

Requirements

• Bachelor's Degree in Electrical / Electronics / Computer Engineering or related field.
• Experience in ATE testing and semiconductor production environment.
• Hands-on experience with Scan / ATPG pattern debug or development.
• Familiar with tester platforms such as Teradyne, Advantest, or equivalent ATE systems.
• Understanding of digital testing concepts and semiconductor test flow.
• Good debugging and problem-solving skills.

Preferred / Bonus Skills

• Knowledge of DFT (Design For Test) concepts:
• Scan architecture
• ATPG flow
• Boundary scan / JTAG
• Fault coverage analysis
• Experience with silicon bring-up or NPI activities.
• Scripting knowledge (Python, Perl, or similar) is an advantage.