Position Overview:
Black Sesame Technologies is seeking motivated and talented fresh graduates to join our team as ASIC STA Engineers. This entry-level position offers an excellent opportunity for recent graduates to embark on a career in ASIC design and timing analysis. We are looking for individuals who are eager to learn and contribute to our innovative projects.
Responsibilities:
- Timing Closure: Oversee timing closure at the block level throughout the project lifecycle to ensure design integrity.
- Timing Verification: Develop and maintain methodologies and workflows for timing verification and closure, ensuring effective timing management.
- Timing Constraints: Collaborate with designers to generate and implement timing constraints (SDC) critical for design performance.
- Timing Analysis: Conduct detailed timing analysis to verify that designs meet required specifications and performance metrics.
- Flows: Assist in constructing and refining workflows to improve efficiency and effectiveness in timing analysis processes.
- Coordinator Role: Collaborate with front-end and back-end teams to achieve the chip PPA (Power, Performance, Area) target.
Qualification/ Requirements:
- Education: Master's degree or higher in Electronics Engineering, Computer Science, or a related field.
- Fundamental knowledge of ASIC timing analysis and synthesis.
- Familiarity with the ASIC development process and design flow.
- Proficiency in programming languages such as Perl, Tcl, Python, or similar.
- Strong communication skills, a collaborative team approach, and a proactive attitude towards learning and problem-solving.
