Analog Engineer

Company Overview

The team has more than 15 years of experience developing 1G/2.5G/5GBase-T Ethernet physical layer PHY and switch chips for data centers, enterprise networks, and gateways and has sucessfully developed multiple generations of the most competitive products.

The company is headquarted in Kunshan, and the R&D team is located in Kunshan, Suzhou, Shanghai, Beijing and Singapore.

The company is currently developing Ethernet PHY, gateway, and TSN switching chips. The target market is automotive & unpiloted driving, China's intelligent manufacturing, rail transit, and intelligent grid building industry provide domestic chips with Independent intellectual property rights, independent and controllable.

We offer a competitive compensation package, including a salary commensurate with experience, Annual Wage Supplement (AWS), performance bonus, and stock options.

Job Responsibilities:

1. Participate in the design and realization of high-speed low-power small-area network chips.
2. Responsible for the design and verification of analog and mixed-signal circuits, particularly the CMOS signal processing circuits with profession in one of these areas, RX(e.g., AFE, ADC), TX(Serializer, DAC), PLL, LDO, ESD/EMC suppression etc.
3. Collaborate with layout engineers to ensure layout quality and design specifications are met.

Job Requirements:

1. Bachelor's or Master's degree in Electrical/Electronic Engineering or a related field.
2. Solid understanding of analog circuit theory and seminconductor device physics.
3. Familiarity with CMOS analog/mixed-signal IC design.
4. Experience in using EDA CAD tools.
5. Knowledge & experience in Verilog coding a plus.
6. Strong communication skills and good team player.